DocumentCode
3395929
Title
Simulation of worst case switching noise on a DDR2 interface
Author
Mandrekar, R. ; Harvey, P.M. ; Kuruts, J. ; Dreps, Daniel ; Ozguner, T. ; Yaping Zhou
Author_Institution
Kazushige Kawasaki, IBM Corp., Austin, TX
fYear
2008
fDate
27-29 Oct. 2008
Firstpage
87
Lastpage
90
Abstract
This paper describes a new technique to simulate worst case simultaneous switching noise on a DDR2 interface. The paper focuses on how the impedance response of the power distribution network can be used in determining an excitation pattern that results in the worst case switching noise on the interface.
Keywords
distribution networks; electric impedance; integrated memory circuits; noise; DDR2 interface; excitation pattern; impedance response; power distribution network; switching noise; Circuit simulation; Driver circuits; Impedance; Noise generators; Noise level; Power systems; Rails; Resonance; Resonant frequency; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2873-1
Type
conf
DOI
10.1109/EPEP.2008.4675884
Filename
4675884
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