DocumentCode
3396870
Title
CORDIC arithmetic for an SVD processor
Author
Cavallaro, Joseph R. ; Luk, Franklin T.
Author_Institution
School of Electrical Engineering, Cornell University-Ithaca, New York 14853, USA
fYear
1987
fDate
18-21 May 1987
Firstpage
113
Lastpage
120
Abstract
Arithmetic issues in the calculation of the Singular Value Decomposition (SVD) are discussed. Traditional algorithms using hardware division and square root are replaced with the special purpose CORDIC algorithms for computing vector rotations and inverse tangents. The CORDIC 2×2 SVD processor can be twice as fast as one assembled from traditional hardware units. A prototype VLSI implementation of a CORDIC SVD processor array is planned for use in real-time signal processing applications.
Keywords
Computational modeling; Equations; Jacobian matrices; Mathematical model; Read only memory; Vectors; Yttrium;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1987 IEEE 8th Symposium on
Conference_Location
Como, Italy
Print_ISBN
0-8186-0774-2
Type
conf
DOI
10.1109/ARITH.1987.6158686
Filename
6158686
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