Title :
A hybrid high-performance embedded Processing System
Author :
Deng, Yi ; Long, Teng
Author_Institution :
Sch. of Inf. & Electron., Beijing Inst. of Technol., Beijing, China
Abstract :
In this paper, we analyze the speedup formula, and expand the formula in detail. After discuss the timing problems of parallel computing, we give some designing rules, specially applied to HPEC (high-performance embedded computing) systems. Further analyzing the characteristics of HPEC system, a modular processing architecture is proposed. Due to the development of interconnection technologies, we design a type of hybrid PE (Processing Element) architecture, and describe the compositions of the PE. The implementation methods of the hybrid PE are described. An actual platform is established to certify the feasibility and performance of the system.
Keywords :
Computer architecture; Digital signal processing; Electronics industry; Embedded computing; Field programmable gate arrays; Hardware; Industrial electronics; Integrated circuit technology; Parallel processing; Signal processing algorithms; embedded; hybrid processing; parallel architecture; real-time computing; signal processing;
Conference_Titel :
Industrial Mechatronics and Automation (ICIMA), 2010 2nd International Conference on
Conference_Location :
Wuhan, China
Print_ISBN :
978-1-4244-7653-4
DOI :
10.1109/ICINDMA.2010.5538322
