DocumentCode
3399196
Title
A hyperplane smart pixel array for packet based switching
Author
Devenport, K.E. ; Hinton, H.S. ; Goodwill, D.J. ; Plant, D.V. ; Rolston, D.R. ; Hsi, W.
Author_Institution
Colorado Univ., Boulder, CO, USA
fYear
1996
fDate
5-9 Aug. 1996
Firstpage
32
Lastpage
33
Abstract
The operation, simulation, and testing of a 4/spl times/2 CMOS-SEED smart pixel array is presented. The smart pixel array discussed implements a hyperplane based ATM switch.
Keywords
CMOS integrated circuits; asynchronous transfer mode; integrated optoelectronics; optical design techniques; optical testing; packet switching; printed circuit design; simulation; smart pixels; 4/spl times/2 CMOS-SEED smart pixel array; hyperplane based ATM switch; hyperplane smart pixel array; operation; packet based switching; simulation; testing; Asynchronous transfer mode; Circuit testing; Data mining; Fabrics; Logic; Optical receivers; Optical switches; Packet switching; Protocols; Smart pixels;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Applications of Lasers in Materials Processing/Broadband Optical Networks/Smart Pixels/Optical MEMs and Their Applications. IEEE/LEOS 1996 Summer Topical Meetings:
Conference_Location
Keystone, CO, USA
Print_ISBN
0-7803-3175-3
Type
conf
DOI
10.1109/LEOSST.1996.540732
Filename
540732
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