DocumentCode
3399497
Title
Design methodology of low-power CMOS RF-ICs
Author
Tsukahara, Tsuneo ; Harada, Mitsuru ; Ugajin, Mamoru ; Kodate, Junichi ; Yamagishi, Akihirro
Author_Institution
NTT Microsystem Integration Labs., Kanagawa, Japan
fYear
2003
fDate
21-24 Jan. 2003
Firstpage
394
Lastpage
399
Abstract
This paper presents design methodology for CMOS RF-ICs in the 2-GHz band. After describing RF transceiver architectures, it introduces some low-voltage, low-power CMOS front-end circuits that use an LC-tank folding technique. Finally, it presents a 1-V, 12-mW image-rejection receiver in the 2-GHz band.
Keywords
CMOS integrated circuits; UHF integrated circuits; integrated circuit design; low-power electronics; transceivers; 1 V; 12 mW; 2 GHz; CMOS RF-ICs; LC-tank folding technique; RF transceiver architectures; design methodology; image rejection receiver; low-power CMOS; low-voltage front-end circuits; Active filters; Bluetooth; Circuits; Design methodology; Energy consumption; Laboratories; Radio frequency; Transceivers; Wideband; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN
0-7803-7659-5
Type
conf
DOI
10.1109/ASPDAC.2003.1195047
Filename
1195047
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