• DocumentCode
    339975
  • Title

    A high performance digital signal processor for compact realization of real-time synthetic aperture radar systems

  • Author

    Kloos, H. ; Wittenburg, J.P. ; Hinrichs, W. ; Lieske, H. ; Pirsch, P.

  • Author_Institution
    Lab. fur Informationstechnol., Hannover Univ., Germany
  • Volume
    1
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    17
  • Abstract
    Modern SAR applications have a large amount of needed processing power. Most of the currently available architectures lack of flexibility or performance. In this paper a new parallel and programmable architecture for image processing applications is described. The presented HiPAR-DSP is able to serve the requested demands, like providing the high performance as a dedicated architecture and still having the flexibility of a fully programmable processor. The implementation of the range compression shows a real-time capability of processing up to 1500 rangelines with 4096 complex samples with the HiPAR-DSP
  • Keywords
    digital signal processing chips; parallel architectures; programmable circuits; radar imaging; real-time systems; synthetic aperture radar; HiPAR-DSP; SAR; compact realization; fully programmable processor; high performance digital signal processor; image processing; parallel programmable architecture; range compression; real-time capability; real-time synthetic aperture radar systems; Computer architecture; Digital signal processors; Frequency domain analysis; Image processing; Microwave filters; Random access memory; Real time systems; Signal processing algorithms; Synthetic aperture radar; VLIW;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Geoscience and Remote Sensing Symposium, 1999. IGARSS '99 Proceedings. IEEE 1999 International
  • Conference_Location
    Hamburg
  • Print_ISBN
    0-7803-5207-6
  • Type

    conf

  • DOI
    10.1109/IGARSS.1999.773386
  • Filename
    773386