DocumentCode :
3399868
Title :
Parallel encoding-decoding of matroid error-correcting codes
Author :
Bodyan, D.G. ; Bodyan, G.C.
Author_Institution :
Tech. Univ. of Moldova, Kishinau
fYear :
2008
fDate :
8-12 Sept. 2008
Firstpage :
389
Lastpage :
390
Abstract :
The algorithm of parallel encoding and decoding of the maximum distance separable matroid codes is proposed. The parity-check matrices with specific structures are applied for synthesis majority-logic circuits of locating and correcting errors. The parameterized VHDL-entities for implementation of the encoder and decoder are designed.
Keywords :
decoding; error correction codes; logic circuits; matrix algebra; majority-logic circuits; matroid error correcting codes; parallel encoding-decoding; parameterized VHDL-entities; parity check matrices; Error correction codes; Helium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave & Telecommunication Technology, 2008. CriMiCo 2008. 2008 18th International Crimean Conference
Conference_Location :
Sevastopol, Crimea
Print_ISBN :
978-966-335-166-7
Electronic_ISBN :
978-966-335-169-8
Type :
conf
DOI :
10.1109/CRMICO.2008.4676426
Filename :
4676426
Link To Document :
بازگشت