DocumentCode
3401769
Title
Design for a recursive parallel multiplier
Author
De Mori, Renata ; Cardin, Régis
Author_Institution
Department of Computer Science, Concordia University, 1455 De Maisonneuve Blvd West, Montréal, Québec, Canada, H3G1M8
fYear
1985
fDate
4-6 June 1985
Firstpage
44
Lastpage
50
Abstract
A network for performing multiplications of two two´s complement numbers is proposed. The network can be implemented in a synchronous or an asynchronous way. If the factors to be multiplied have N bits, the area complexity of the network is O(N2) for practical values of N as in the case of cellular multipliers. Due to the design approach based on a recursive algorithm, a time complexity O(log N) is achieved.
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1985 IEEE 7th Symposium on
Conference_Location
Urbana, IL,
Type
conf
DOI
10.1109/ARITH.1985.6158965
Filename
6158965
Link To Document