Flexible silicon compilation of charge redistribution data conversion systems

Author

Leme, C. ; Yufera, A. ; Paris, L. ; Horta, N. ; Rueda, A. ; Osés, T. ; Franca, J.E. ; Huertas, J.I.

Author_Institution

Inst. Superior Tecnico, Lisboa, Portugal

fYear

1991

fDate

14-17 May 1991

Firstpage

403

Abstract

A system for the automatic synthesis of analog-digital (A/D) and digital-analog (D/A) converters employing binary weighted capacitor arrays is presented. By incorporating different circuit topologies as well as a powerful self-calibration technique, this system is capable of synthesizing conversion architectures to meet a broad range of resolution and performance requirements. It is formed by MDAC, a menu-driven architecture compiler, and ALSAC, a layout compiler including analog constraints

Keywords

analogue-digital conversion; circuit layout CAD; digital-analogue conversion; network topology; ADC; ALSAC; DAC; MDAC; analog constraints; automatic synthesis; binary weighted capacitor arrays; charge redistribution; circuit topologies; conversion architectures; data conversion systems; layout compiler; menu-driven architecture compiler; performance requirements; resolution; self-calibration technique; silicon compilation; Capacitors; Circuit synthesis; Clocks; Data conversion; Design methodology; Signal resolution; Silicon; Switches; Switching converters; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-0620-1

Type

conf

DOI

10.1109/MWSCAS.1991.252182

Filename

252182