• DocumentCode
    340649
  • Title

    Design and implementation of the level 1 charged particle trigger for the BABAR detector

  • Author

    Berenyi, A. ; Chen, H.K. ; Dao, K. ; Dow, S.F. ; Gehrig, S.K. ; Gill, M.S. ; Grace, C. ; Jared, R.C. ; Johnson, J.K. ; Karcher, A. ; Kasen, D. ; Kirsten, F.A. ; Kral, J.F. ; LeClerc, C.M. ; Levi, M.E. ; von der Lippe, H. ; Liu, T.H. ; Marks, K.M. ; Meyer,

  • Author_Institution
    Lawrence Berkeley Lab., CA, USA
  • Volume
    1
  • fYear
    1998
  • fDate
    1998
  • Firstpage
    273
  • Abstract
    The environment of the high-luminosity PEP-II machine poses unique design challenges for the trigger system of the BABAR detector. These led to the adoption of a real-time parallel pipelined architecture for the trigger electronics which departs significantly from previous implementations at conventional e+e- experiments. One challenge for the trigger designer lies in detecting low multiplicity physics events with high efficiency while keeping the background rate within the data acquisition limits. To achieve this difficult task, creative and innovative high-speed trigger algorithms were designed, simulated and implemented in Field Programmable Gate Arrays on printed circuit boards, using advanced CAD/CAE tools. The simulation results indicate that these algorithms will be able to perform all required tasks quickly and efficiently. This paper describes the design of the Level 1 Drift Chamber Trigger System of the BABAR detector, including the trigger algorithms, design and test methodology of the implementation, as well as test and simulation results
  • Keywords
    Cherenkov counters; calorimeters; drift chambers; field programmable gate arrays; high energy physics instrumentation computing; nuclear electronics; parallel processing; pipeline processing; position sensitive particle detectors; semiconductor counters; trigger circuits; BABAR detector; Level 1 Drift Chamber Trigger System; data acquisition; field programmable gate arrays; level 1 charged particle trigger; real-time parallel pipelined architecture; trigger algorithms; Algorithm design and analysis; Circuit simulation; Data acquisition; Design automation; Detectors; Event detection; Field programmable gate arrays; Physics; Printed circuits; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nuclear Science Symposium, 1998. Conference Record. 1998 IEEE
  • Conference_Location
    Toronto, Ont.
  • ISSN
    1082-3654
  • Print_ISBN
    0-7803-5021-9
  • Type

    conf

  • DOI
    10.1109/NSSMIC.1998.775144
  • Filename
    775144