DocumentCode :
3413786
Title :
High-level analog synthesis using signal flow graph transformations
Author :
Guindi, Rafik S. ; Elmasry, Mohamed I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
fYear :
1995
fDate :
18-22 Sep 1995
Firstpage :
366
Lastpage :
369
Abstract :
A high-level top-down analog synthesis methodology is presented. It translates an initial signal flow graph representation of a transfer function into an architecture made of interconnected analog primitives. Constraints are imposed on the primitive weights and interconnections to ensure realizability. Transformations that generate realisable architectures are presented and illustrated through examples
Keywords :
high level synthesis; CAD; SFG; high-level analog synthesis; interconnected analog primitives; signal flow graph transformations; top-down analog synthesis methodology; transfer function; Computer architecture; Cost function; Flow graphs; High level synthesis; Integrated circuit interconnections; Resistors; Signal generators; Signal synthesis; Transfer functions; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International
Conference_Location :
Austin, TX
ISSN :
1063-0988
Print_ISBN :
0-7803-2707-1
Type :
conf
DOI :
10.1109/ASIC.1995.580750
Filename :
580750
Link To Document :
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