Title :
A 200MS/s 14b 97mW DAC in 0.18μm CMOS
Author :
Qiuting Huang ; Francese, Pier Andrea ; Martelli, Cicero ; Nielsen, Jakob
Author_Institution :
Integrated Syst. Lab., ETH Zurich, Switzerland
Abstract :
A fully analog loop calibrates 32 MSB floating current sources in the background to achieve 14b accuracy. Operating at 200MS/s, the 97mW DAC achieves maximum SFDR of 85dB in NRZ mode, 76dB in RZ mode, and maintains -160dBm/Hz noise spectral density. Implemented in 0.18μm CMOS, the core area is less than 1mm2.
Keywords :
CMOS integrated circuits; calibration; current comparators; digital-analogue conversion; high-speed integrated circuits; 14 bit; 97 mW; CMOS DAC; VDSL modem; background calibration loop; current comparator; current mirror; floating current source calibration; fully analog loop; high-speed high-resolution DAC; oversampling; Calibration; Capacitors; Circuits; Digital-analog conversion; Digital-to-frequency converters; Frequency synthesizers; Impedance; Laboratories; Low voltage; Mirrors;
Conference_Titel :
Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
Print_ISBN :
0-7803-8267-6
DOI :
10.1109/ISSCC.2004.1332745
