• DocumentCode
    341469
  • Title

    A low-power switched-current algorithmic A/D converter

  • Author

    Tezel, A. ; Akin, T.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Middle East Tech. Univ., Ankara, Turkey
  • Volume
    1
  • fYear
    1999
  • fDate
    36342
  • Firstpage
    282
  • Abstract
    This paper reports the development of a low-power switched-current algorithmic A/D converter based on a new algorithm, providing the bit conversion in three-cycles. The converter uses modified S2I type current copiers to reduce the overall area and power consumption. The analog portion of the converter occupies only 0.35 mm2 area in 3 μm CMOS technology. The simulation results show that the converter provides 10 bits resolution with a conversion rate of 61 kHz, while dissipating only 1 mW power from a single 5 V supply
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; low-power electronics; switched current circuits; 1 mW; 10 bit; 3 micron; 5 V; 61 kHz; CMOS technology; algorithmic A/D converter; low-power SI A/D converter; modified S2I type current copiers; switched-current ADC; three-cycle bit conversion; CMOS technology; Circuit optimization; Energy consumption; Flowcharts; Logic; Power dissipation; Switching converters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-5471-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1999.777858
  • Filename
    777858
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=341469