Title :
Efficient and reliable Schottky barrier silicon nanowire charge-trapping flash memory
Author :
Chenhsin Lien ; Chun-Hsing Shih ; We Chang ; Yan-Xiang Luo ; Ruei-Kai Shia ; Wen-Fa Wu
Author_Institution :
Inst. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
This paper presents experimentally a novel Schottky barrier (SB) silicon nanowire charge-trapping memory with low-voltage operations and excellent reliability. The unique SB source/drain junctions are utilized to produce strong enhancements of hot-electrons or hot-holes generations to perform efficient programming and erasing (P/E). The efficient P/E injections enable the multi-level SB memory cells to operate at sub-10V gate voltages through Fowler-Nordheim mode P/E. Additionally, the roles of electron and hole carriers in N-channel cells can be switched directly to operate the SB nanowire devices in P-channel cells because of ambipolar conduction. Reliability characterization confirms the SB nanowire cells operate well after cycling endurance and data retention tests.
Keywords :
Schottky barriers; elemental semiconductors; flash memories; hot carriers; integrated circuit reliability; nanowires; silicon; Fowler-Nordheim mode; N-channel cells; P-E injections; P-channel cells; Schottky barrier silicon nanowire charge-trapping flash memory; Si; ambipolar conduction; cycling endurance; data retention tests; electron carriers; gate voltages; hole carriers; hot-electrons; hot-holes generations; low-voltage operations; multilevel SB memory cells; nanowire cells; nanowire devices; programming and erasing; reliability characterization; source-drain junctions; voltage 10 V; Charge carrier processes; Logic gates; Programming; Reliability; SONOS devices; Silicon; Threshold voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467580