DocumentCode
3418602
Title
Built-in self-test in mixed-signal ICs: a DTMF macrocell
Author
Huertas, Gloria ; Vazquez, Diego ; Rueda, Adoración ; Huertas, José L.
Author_Institution
Inst. de Microelectron., Seville Univ., Spain
fYear
2000
fDate
2000
Firstpage
568
Lastpage
571
Abstract
This paper describes a Design-for-Test (DfT) approach to implement a DTMF embeddable macrocell. The goal is to prove the feasibility of a Built-In-Self-Test (BIST) methodology to mixed-signal ICs. Results from a silicon demonstrator are presented
Keywords
VLSI; built-in self test; design for testability; integrated circuit design; integrated circuit testing; mixed analogue-digital integrated circuits; ASIC; BIST methodology; DFT approach; DTMF macrocell; DTMF receiver; built-in self-test; design-for-test approach; mixed-signal ICs; Built-in self-test; Circuit testing; Electronic design automation and methodology; Feedback loop; Filter bank; Frequency; Macrocell networks; Multiplexing; Oscillators; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2000. Thirteenth International Conference on
Conference_Location
Calcutta
ISSN
1063-9667
Print_ISBN
0-7695-0487-6
Type
conf
DOI
10.1109/ICVD.2000.812668
Filename
812668
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