DocumentCode
3419484
Title
An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems
Author
Mise, Toshiro ; Shinyashiki, Yasufumi ; Hashimoto, Masaaki ; Ubayashi, Naoyasu ; Katamine, Keiichi ; Nakatani, Takako
Author_Institution
Matsushita Electoric Works Syst. Solutions Co., Ltd., Fukuoka, Japan
fYear
2005
fDate
15-17 Dec. 2005
Abstract
This paper describes an analysis method with failure scenario matrix for specifying unexpected obstacles in order to improve the quality of embedded systems. Although embedded software has become increasingly large in scale and complexity, companies are requiring the software to be developed within shorter periods of time. Therefore, the quality of the software is bound to suffer. This problem is one of the most serious concerns in a coming age of ubiquitous embedded systems. In order to improve the quality, it is very important to specify the forbidden behavior of embedded systems. The forbidden behavior of unexpected obstacles is analyzed by using a matrix and scenarios. This paper provides a detailed description of the analysis method used, in particular the cause, phenomenon, and goal in the scenario, relating them to each other by using a matrix.
Keywords
embedded systems; formal specification; software quality; embedded software quality; failure scenario matrix; ubiquitous embedded systems; unexpected obstacle specification; Electrical products; Embedded computing; Embedded software; Embedded system; Failure analysis; Pervasive computing; Software design; Software quality; Software safety; System software;
fLanguage
English
Publisher
ieee
Conference_Titel
Software Engineering Conference, 2005. APSEC '05. 12th Asia-Pacific
ISSN
1530-1362
Print_ISBN
0-7695-2465-6
Type
conf
DOI
10.1109/APSEC.2005.30
Filename
1607182
Link To Document