DocumentCode :
3420403
Title :
Loop transformations for interface-based hierarchies IN SDF graphs
Author :
Piat, Jonathan ; Bhattacharyya, Shuvra S. ; Raulet, Mickael
Author_Institution :
Image & Remote Sensing Lab., IETR/INSA, Rennes, France
fYear :
2010
fDate :
7-9 July 2010
Firstpage :
341
Lastpage :
344
Abstract :
Data-flow has proven to be an attractive computation model for programming digital signal processing (DSP) applications. A restricted version of data-flow, termed synchronous data-flow (SDF), offers strong compile-time predictability properties, but has limited expressive power. A new type of hierarchy (Interface-based SDF) has been proposed allowing more expressivity while maintaining its predictability. One of the main problems with this hierarchical SDF model is the lack of trade-off between parallelism and network clustering. This paper presents a systematic method for applying an important class of loop transformation techniques in the context of interface-based SDF semantics. The resulting approach provides novel capabilities for integrating parallelism extraction properties of the targeted loop transformations with the useful modeling, analysis, and code reuse properties provided by SDF.
Keywords :
Application software; Computer architecture; Computer interfaces; Digital signal processing; Parallel processing; Power engineering computing; Power system modeling; Processor scheduling; Programming profession; System recovery; Code Generation; Data-Flow programming; Loop parallelization; SDF graph; Scheduling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-specific Systems Architectures and Processors (ASAP), 2010 21st IEEE International Conference on
Conference_Location :
Rennes, France
ISSN :
2160-0511
Print_ISBN :
978-1-4244-6966-6
Electronic_ISBN :
2160-0511
Type :
conf
DOI :
10.1109/ASAP.2010.5540954
Filename :
5540954
Link To Document :
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