DocumentCode :
3423700
Title :
Automated translation of C/C++ models into a synchronous formalism
Author :
Kalla, Hamoudi ; Talpin, Jean-Pierre ; Berner, David ; Besnard, Loic
Author_Institution :
ESPRESSO team, IRISA-INRIA, Rennes
fYear :
2006
fDate :
27-30 March 2006
Lastpage :
436
Abstract :
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system level capture in software programming languages such as C/C++ allow for a comfortable design entry and simulation, but mere simulation is not enough to ensure proper design integration. Validating that reused components are properly connected to each other and function correctly has become a major issue for such designs and requires the use of formal methods. In this paper, we propose an approach in which we automatically translate C/C++ programs into the synchronous formalism SIGNAL, hence enabling the application of formal methods without having to deal with the complex and error prone task to build formal models by hand. The main benefit of considering the model of SIGNAL for C/C++ languages lies in the formal nature of the synchronous language SIGNAL, which supports verification and optimization techniques. The C/C++ into SIGNAL transformation process is performed in two steps. We first translate C/C++ programs into an intermediate Static Single Assignment form, and next we translate this into SIGNAL programs. Our implementation of the SIGNAL generation is inserted in the GNU compiler collection source code as an additional front end optimization pass. It does benefit from both GCC code optimization techniques as well as the optimizations of the SIGNAL compiler
Keywords :
C++ language; formal specification; optimising compilers; program interpreters; program verification; software reusability; CC++ languages; CC++ model; GCC code optimization; GNU compiler collection source code; SIGNAL transformation process; automated translation; complex system; formal methods; front end optimization; intellectual property; software programming language; static single assignment form; synchronous formalism; synchronous language; Computer languages; Design methodology; Embedded software; Embedded system; Intellectual property; Optimizing compilers; Process design; Signal design; Signal generators; Signal processing; Formal Methods; Functional and Compositional Design Correctness; GNU Compiler Collection; SIGNAL; Static Single Assignment; Synchronous Formalism;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Engineering of Computer Based Systems, 2006. ECBS 2006. 13th Annual IEEE International Symposium and Workshop on
Conference_Location :
Potsdam
Print_ISBN :
0-7695-2546-6
Type :
conf
DOI :
10.1109/ECBS.2006.27
Filename :
1607393
Link To Document :
بازگشت