DocumentCode
3429490
Title
A processor-time minimal systolic array for transitive closure
Author
Scheiman, Chris J. ; Cappello, Peter R.
Author_Institution
Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
fYear
1990
fDate
5-7 Sep 1990
Firstpage
19
Lastpage
30
Abstract
A directed acyclic graph (DAG) model of algorithms is used. For a given DAG the authors focus on processor-time minimal multiprocessor schedules: time minimal multiprocessor schedules that use as few processors as possible. The Kung, Lo and Lewis (KLL) algorithm (S.-Y. Kung et al., 1987) for computing the transitive closure of a relation over a set of n elements requires at least 5n -4 steps. Their systolic array comprises n 2 processing elements. Here, it first is shown that any multiprocessor that achieves this 5n -4 time bound needs at least [n 2/3] processing elements. Then, a processor-time minimal systolic array realizing the KLL algorithm´s DAG is constructed. Its [n 2 /3] processing elements are organized as a cylindrically connected 2-D mesh, when n ≡0 mod 3. When n is not identical to 0 mod 3, the 2-D mesh is connected as a twisted torus
Keywords
graph theory; parallel architectures; systolic arrays; cylindrically connected 2-D mesh; directed acyclic graph; minimum number of processors; processor-time minimal multiprocessor schedules; processor-time minimal systolic array; systolic array; time minimal multiprocessor schedules; transitive closure; twisted torus 2D mesh; Computer science; Constraint optimization; Difference equations; Hypercubes; Linearity; NP-complete problem; Processor scheduling; Routing; Systolic arrays; Tree graphs;
fLanguage
English
Publisher
ieee
Conference_Titel
Application Specific Array Processors, 1990. Proceedings of the International Conference on
Conference_Location
Princeton, NJ
Print_ISBN
0-8186-9089-5
Type
conf
DOI
10.1109/ASAP.1990.145439
Filename
145439
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