A novel high-speed quasi-SOI power MOSFET with suppressed parasitic bipolar effect fabricated by reversed silicon wafer direct bonding

One of the most important issues related to thin-film SOI power MOSFETs is how to improve their high-frequency switching performance. Reducing the product of on-resistance (Ron) and output capacitance (Coss) by shrinking the design rule is an effective way to improve it. However, it has a limitation because it pronounces the parasitic bipolar effect which degrades the high-frequency performance and shrinks the safety operating area. Forming body contacts is a useful way to suppress the parasitic bipolar effect, however it increases Ron/spl middot/Coss. A quasi-SOI structure was proposed to overcome the problem of the parasitic bipolar effect based the numerical simulations. This paper presents a novel high-speed quasi-SOI power MOSFET and its fabrication process.