DocumentCode
343171
Title
Trends in digital signal processors
Author
Mujtaba, Syed Aon
Author_Institution
Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA
fYear
1999
fDate
1999
Firstpage
108
Lastpage
111
Abstract
To facility the implementation of complex signal processing algorithms future DSPs will be required to deliver higher performance and ease of programmability without compromising power dissipation and code density. To meet these conflicting requirements, several architectures have been proposed such as EPIC, VLIW, and superscalar. In this paper, we chart the evolution of DSPs-starting from a simple Multiply-Accumulate engine and progressing to a system-on-a-chip embodying some variant of a parallel processing machine
Keywords
digital signal processing chips; parallel architectures; EPIC architecture; VLIW architecture; code density; digital signal processor; multiply-accumulate engine; parallel processing; power dissipation; programmability; signal processing algorithm; superscalar architecture; system-on-a-chip; Application specific integrated circuits; Costs; Digital signal processing; Digital signal processors; Engines; Parallel processing; Power dissipation; Signal processing algorithms; Software algorithms; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 1999. International Symposium on
Conference_Location
Taipei
ISSN
1524-766X
Print_ISBN
0-7803-5620-9
Type
conf
DOI
10.1109/VTSA.1999.786012
Filename
786012
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