• DocumentCode
    3433993
  • Title

    Analysis and diagnosis of multiple simultaneous defects

  • Author

    Ladhar, Aymen ; Masmoudi, Mohamed

  • Author_Institution
    Micro-Technol. & Commun. Lab. Sfax, STMicroelectron., Sfax, Tunisia
  • fYear
    2009
  • fDate
    13-16 Dec. 2009
  • Firstpage
    671
  • Lastpage
    674
  • Abstract
    In this paper, we present a new approach to diagnose multiple manufacturing defects affecting digital integrated circuits (IC). The method treats each failing pattern as an independent diagnosis, and finds out the location of potential candidates when they are simultaneously simulated explain each failing pattern. Our methodology consists in three main steps and can diagnose three types of multiple defect configurations. Experiments were performed in good ICs in which different types of multiple faults were injected. The correct fault locations and cause were predicted in all cases.
  • Keywords
    digital integrated circuits; digital integrated circuits; fault locations; multiple simultaneous defect diagnosis; Circuit faults; Digital integrated circuits; Failure analysis; Fault detection; Fault diagnosis; Integrated circuit manufacture; Laboratories; Manufacturing processes; Partitioning algorithms; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on
  • Conference_Location
    Yasmine Hammamet
  • Print_ISBN
    978-1-4244-5090-9
  • Electronic_ISBN
    978-1-4244-5091-6
  • Type

    conf

  • DOI
    10.1109/ICECS.2009.5410808
  • Filename
    5410808