DocumentCode :
3437495
Title :
On the use of highly accelerated electromigration tests (SWEAT) on copper
Author :
Zitzelsberger, Anke ; Bauer, Robert ; Von Hagen, Jochen ; Penka, Sabine ; Pietsch, Andreas ; Ungar, Franz ; Walter, Wolfgang
Author_Institution :
Infineon Technol. AG, Munich, Germany
fYear :
2003
fDate :
30 March-4 April 2003
Firstpage :
161
Lastpage :
165
Abstract :
Electromigration (EM) tests on copper metallization have been performed in a wide range of stress conditions using both, highly accelerated wafer level (WL) test and standard iso-current package level (PL) tests in order to determine the kinetics and the acceleration limits of highly accelerated tests. Similar activation energies and current density exponents were found for via-line structures tested with both stress methods, implying that the same mass transport mechanisms lead to the EM fail. Using the experimentally determined activation energy and current density exponent to extrapolate the data of moderate PL and highly accelerated WL tests to operation conditions similar life times are obtained. As a consequence, fast WL tests can not only be used for monitoring but also to quantify the reliability of the metallization. A detection of an early fail mode (as might occur for some via-line configurations in copper interconnects) is not yet proven with highly accelerated tests, since thermal inhomogeneities caused by higher stress conditions can hide certain failure modes.
Keywords :
copper; current density; electromigration; failure analysis; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; life testing; Cu; SWEAT; acceleration limits; activation energies; copper metallization; current density exponents; early fail mode detection; failure modes; highly accelerated electromigration tests; highly accelerated wafer level test; kinetics; life times; mass transport mechanisms; metallization reliability quantification; monitoring; operation conditions; standard iso-current package level tests; stress conditions; thermal inhomogeneities; via-line structures; Copper; Current density; Electromigration; Life estimation; Metallization; Packaging; Performance evaluation; Testing; Thermal stresses; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium Proceedings, 2003. 41st Annual. 2003 IEEE International
Print_ISBN :
0-7803-7649-8
Type :
conf
DOI :
10.1109/RELPHY.2003.1197738
Filename :
1197738
Link To Document :
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