DocumentCode
3437596
Title
Scalable modeling of Through Silicon Vias up to milimeter-wave frequency
Author
Kuan-Chung Lu ; Tzyy-Sheng Horng ; Chi-Han Chen ; Chang-Ying Hung ; Pao-Nan Lee ; Meng-Jen Wang ; Chih-Pin Hung ; Ho-Ming Tong
Author_Institution
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear
2012
fDate
9-11 Dec. 2012
Firstpage
168
Lastpage
171
Abstract
In this study, measurements are made to validate the electrical performance of a Through Silicon Via (TSV) interconnection up to 40GHz, and the results of the wideband scalable model of TSV is proposed and compared with the measured data. Measurement of the TSV structure demonstrates its advantages of low parasitic capacitance and low insertion loss at high frequency.
Keywords
capacitance; integrated circuit modelling; three-dimensional integrated circuits; interconnection; low insertion loss; low parasitic capacitance; milimeter-wave frequency; scalable modeling; through silicon vias; wideband scalable model; Calibration; Capacitance; Frequency measurement; Integrated circuit modeling; Silicon; Substrates; Through-silicon vias;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2012 IEEE
Conference_Location
Taipei
Print_ISBN
978-1-4673-1444-2
Electronic_ISBN
978-1-4673-1445-9
Type
conf
DOI
10.1109/EDAPS.2012.6469406
Filename
6469406
Link To Document