DocumentCode
3438152
Title
EvoDeb: Debugging Evolving Hardware Designs
Author
Bhattacharjee, D. ; Banerjee, A. ; Chattopadhyay, A.
Author_Institution
Indian Stat. Inst., Kolkata, India
fYear
2015
fDate
3-7 Jan. 2015
Firstpage
481
Lastpage
486
Abstract
Increasing design complexity, skyrocketing fabrication costs for modern digital systems coupled with an unacceptably large number of silicon respins led to growing importance of comprehensive and automated design verification. Akin to software configuration management, it is becoming commonplace to maintain large hardware design code-bases with hardware configuration management tools. A missing piece of crucial technology in this approach is to manage design verification across evolving hardware designs. In this paper, we propose an efficient methodology for automatically localizing design errors across design versions. The proposed technique, Evo Deb, can be easily integrated into a hardware configuration management framework and is scalable for large designs. We demonstrate the efficacy of Evo Deb on a couple of bugs on open-source hardware designs across multiple evolving variants.
Keywords
configuration management; digital systems; formal verification; program debugging; EvoDeb; automated design verification; comprehensive design verification; debugging evolving hardware designs; design complexity; fabrication costs; hardware configuration management tools; hardware design code-bases; modern digital systems; open-source hardware designs; silicon respins; software configuration management; Clocks; Computer bugs; Debugging; Hardware; Hardware design languages; Sensitivity; Time-domain analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design (VLSID), 2015 28th International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Type
conf
DOI
10.1109/VLSID.2015.87
Filename
7031781
Link To Document