Comparing ATPGs for synchronous sequential circuits

A comparison is made of some of the approaches to sequential automatic test pattern generation (ATPG). The criterion that guided the choice was to select one or more representatives of the topological, simulation-based, or functions- and automata-based methods for which experimental data on the standard benchmark set of F. Brglez et al. (IEEE Int. Symp. on Circ. and Syst., p. 1929, May 1989) were available. The authors consider STG3 (sequential circuit Test Generator) and HITEC as representatives of the topological approach, CONTEST (concurrent testing) for the simulation-based one, and SETA (Sequential Testing based on Automata) for the automaton-based class. A comparison is presented of experimental results in terms of fault coverage and CPU time. Once the most awkward circuits have been identified, the authors show the influence of structural parameters on ATPG performance, specifically in terms of regions that indicate the structural difficulty of controlling and observing faults