An overview of the current steering logic (CSL): from the gate to the applications

Author

Sáez, R. T L ; Kayal, M. ; Declercq, M. ; Schneider, M.C.

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland

Volume

3

fYear

1998

fDate

1998

Firstpage

183

Abstract

This paper focuses on a description of a CMOS Current Steering Logic (CSL) approach, intended to work in a low voltage mixed-mode environment. Performance criteria as well as a design methodology are reviewed. The design flow adopted to implement CSL gate layouts is discussed. Finally, a CSL library has been developed and validated by the implementation of an algorithm used in an offset compensation scheme for a CMOS operational amplifier

Keywords

CMOS logic circuits; compensation; integrated circuit layout; logic design; low-power electronics; mixed analogue-digital integrated circuits; operational amplifiers; 0.7 mum; ATMEL-ES2 0.7 μm CMOS technology; CMOS current steering logic; CMOS operational amplifier; CSL gate layouts; CSL library; design flow; design methodology; low voltage mixed-mode environment; offset compensation scheme; performance criteria; CMOS logic circuits; CMOS technology; Circuit noise; Interference; Inverters; Libraries; Low voltage; Noise level; Power capacitors; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 1998 IEEE International Conference on

Conference_Location

Lisboa

Print_ISBN

0-7803-5008-1

Type

conf

DOI

10.1109/ICECS.1998.813963

Filename

813963