VLSI Implementation of High-Speed Cellular Automata Encryption Algorithm

Author

Anghelescu, Petre ; Sofron, Emil ; Ionita, Silviu

Author_Institution

Dept. of Electron. & Comput., Pitesti Univ., Pitesti

Volume

2

fYear

2007

fDate

Oct. 15 2007-Sept. 17 2007

Firstpage

509

Lastpage

512

Abstract

This paper present a hardware implementation in a FPGA circuit of an efficient encryption algorithm based on cellular automata. We demonstrate in this paper how microscopic (local) interactions influence the overall macroscopic (global) behavior of the whole system. A regular, modular, and cascadable hardware implementation of the encryption system has been implemented, which is efficient in terms of VLSI technology. The experimental results prove the powerful of cellular automata encryption systems. The method supports both software and hardware implementation. The design has been specified in VHDL targeted on a XC3S400 based FPGA and verified for functional correctness by software simulation.

Keywords

VLSI; cellular automata; cryptography; field programmable gate arrays; hardware description languages; VHDL; VLSI implementation; XC3S400 based FPGA; hardware implementation; high-speed cellular automata encryption algorithm; macroscopic behavior; microscopic interactions; Automata; Circuits; Cryptography; Electronic mail; Field programmable gate arrays; Hardware; Information security; Logic; Microscopy; Very large scale integration; Cellular Automata; FPGA; PRNG;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 2007. CAS 2007. International

Conference_Location

Sinaia

ISSN

1545-827X

Print_ISBN

978-1-4244-0847-4

Type

conf

DOI

10.1109/SMICND.2007.4519772

Filename

4519772