DocumentCode
3440877
Title
IC implementation of switched capacitor chaotic neuron
Author
Horio, Y. ; Suyama, K.
Author_Institution
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Volume
6
fYear
1994
fDate
30 May-2 Jun 1994
Firstpage
97
Abstract
IC implementation of chaotic neuron using switched capacitor circuit technique is described. Various measured results are presented and interpreted. A new phenomenon called “transient chaos”, which is essential for chaotic simulated annealing, is also demonstrated
Keywords
CMOS analogue integrated circuits; analogue processing circuits; chaos; neural chips; simulated annealing; switched capacitor networks; CMOS analogue circuits; IC implementation; SC networks; neural chips; simulated annealing; switched capacitor chaotic neuron; transient chaos; Analog integrated circuits; CMOS technology; Chaos; Circuit simulation; Neural networks; Neurofeedback; Neurons; Simulated annealing; Switched capacitor networks; Telecommunication switching;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on
Conference_Location
London
Print_ISBN
0-7803-1915-X
Type
conf
DOI
10.1109/ISCAS.1994.409535
Filename
409535
Link To Document