Title :
An efficient method for the self-consistent electro-thermal simulation and its integration into a CAD framework
Author :
Székely, V. ; Poppe ; Rencz ; Farkas ; Csendes ; Páhi, A.
Author_Institution :
Dept. of Electron Devices, Tech. Univ. Budapest, Hungary
Abstract :
In this paper we address the chip-level thermal simulation problem. Our work is based on some early results treating electro-thermal problems on circuit level. The developed electro-thermal simulation package has been integrated under Cadence DFWII (Opus). Due to its relatively low CPU need this package can be used as a thermal verification tool of layouts of analog circuits
Keywords :
analogue integrated circuits; circuit CAD; circuit analysis computing; digital simulation; integrated circuit design; integrated circuit modelling; thermal analysis; thermal resistance; CAD framework; CPU need; Cadence DFWII; IC design; analog circuit layout; chip-level thermal simulation problem; circuit simulation; self-consistent electro-thermal simulation; simulation package; thermal verification tool; Analog circuits; Central Processing Unit; Circuit simulation; Electron devices; Integrated circuit modeling; Packaging; Semiconductor device modeling; Steady-state; Temperature; Thermal resistance;
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-7424-5
DOI :
10.1109/EDTC.1996.494368
