DocumentCode :
3442283
Title :
Generalized Recognition Of Gates: a VLSI abstraction tool
Author :
Guignet, Jean Bruce
Author_Institution :
Bull Electron. Eng. Services, Les Clayes Sous Bois, France
fYear :
1996
fDate :
11-14 Mar 1996
Firstpage :
608
Abstract :
Summary form only given. The Generalized Recognition Of Gates is an innovative and technology independent tool of abstraction. It translates any VLSI or ASIC microelectronic circuit from its netlist format into both VHDL and VERILOG descriptions which express its behavior. The CMOS, NMOS, bipolar and BiCMOS technologies can all be handled. One of the most important characteristics of the tool is that it is driven by an external library of rules. This reverse engineering approach is fast and well adapted to both the verification and the technology migration tasks
Keywords :
VLSI; application specific integrated circuits; circuit layout CAD; hardware description languages; integrated circuit design; logic CAD; ASIC; Generalized Recognition Of Gates; VERILOG description; VHDL description; VLSI abstraction tool; external library of rules; microelectronic circuit; netlist format; reverse engineering approach; technology independent tool; technology migration tasks; verification; Application specific integrated circuits; BiCMOS integrated circuits; CMOS technology; Collaboration; Hardware design languages; Libraries; MOS devices; Microelectronics; Semiconductor device modeling; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1996. ED&TC 96. Proceedings
Conference_Location :
Paris
ISSN :
1066-1409
Print_ISBN :
0-8186-7424-5
Type :
conf
DOI :
10.1109/EDTC.1996.494372
Filename :
494372
Link To Document :
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