Title :
A pipeline A/D converter for WCDMA applications
Author :
Sumanen, Lauri ; Waltari, Mikko ; Halonen, Kari
Author_Institution :
Lab. of IRC/Electron. Circuit Design, Helsinki Univ. of Technol., Espoo, Finland
Abstract :
A 40 MS/s 8-bit CMOS pipeline A/D converter for Wideband CDMA (WCDMA) applications is implemented in a 0.5 μm CMOS technology. Small power consumption is achieved by using 1.5 bit/stage pipeline architecture and by scaling the capacitor values along the converter. Digital correction allows us also to use dynamic comparators. The multiplying D/A converters (MDACs) utilize a modified folded cascode amplifier. The measured DNL is 0.85 LSB and INL 1.91 LSB. The converter achieves over 48 dBc SFDR and more than 41 dBc SNDR dissipating 61 mW from a 2.7 V supply
Keywords :
CMOS integrated circuits; analogue-digital conversion; code division multiple access; digital radio; high-speed integrated circuits; low-power electronics; mobile radio; pipeline processing; radio equipment; 0.5 micron; 2.7 V; 61 mW; 8 bit; WCDMA applications; digital correction; dynamic comparators; low power consumption; modified folded cascode amplifier; multiplying D/A converters; multiplying DAC; pipeline A/D converter; pipeline ADC; wideband CDMA; 3G mobile communication; CMOS technology; Capacitors; Energy consumption; Feedback; Low voltage; Multiaccess communication; Pipelines; Sampling methods; Switches;
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
DOI :
10.1109/ICECS.1999.814429
