• DocumentCode
    345110
  • Title

    Synthesis of XOR storage schemes with different cost for minimization of memory contention

  • Author

    Chen, Song ; Postula, Adam ; Jozwiak, Lech

  • Author_Institution
    Dept. of Comput. Sci. & Electr. Eng., Queensland Univ., Brisbane, Qld., Australia
  • Volume
    1
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    170
  • Abstract
    Parallel memory modules are widely used to increase memory bandwidth in parallel image processing and numerical analysis. A storage scheme, representing the way how data arrays are stored among parallel memory modules, is crucial to the system performance. XOR-schemes form one general class of storage schemes with easy address generation. In this paper, two classes of XOR-schemes are defined to make the trade-off between the cost of storage scheme implementation and the access efficiency. The column-one scheme is used to minimize the cost and the column-two scheme to reduce the memory access conflicts under moderate cost. The cost and the performance relations among different classes of XOR-schemes are found by simulation study. The general access conflict-free conditions for shifted blocks are found. The genetic algorithm is used to search the design space automatically, which is shown to be more effective than heuristics. A variety of data templates can be handled under our genetic search method, including any power-of-two templates (such as rows, columns, blocks, and crumbled blocks), diagonals, and shifted blocks, etc. The method can be used to synthesize storage schemes for different applications to minimize memory access contention and the implementation cost of the storage scheme
  • Keywords
    image processing; logic design; memory architecture; minimisation; search problems; XOR storage schemes synthesis; column-one scheme; conflict-free conditions; data arrays; data templates; design space; genetic algorithm; genetic search method; memory access contention; memory bandwidth; memory contention minimisation; numerical analysis; parallel image processing; parallel memory modules; system performance; Algorithm design and analysis; Bandwidth; Computer science; Costs; Electronic switching systems; Genetic algorithms; Image analysis; Image processing; Image storage; Tellurium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    EUROMICRO Conference, 1999. Proceedings. 25th
  • Conference_Location
    Milan
  • ISSN
    1089-6503
  • Print_ISBN
    0-7695-0321-7
  • Type

    conf

  • DOI
    10.1109/EURMIC.1999.794463
  • Filename
    794463