DocumentCode
3460285
Title
Two-stage adaptive power amplifier MMIC for handset applications
Author
Noh, Y.S. ; Yom, I.B. ; Park, C.S.
Author_Institution
Satellite Commun. RF Technol. Team, Electron. & Telecommun. Res. Inst., Daejeon, South Korea
Volume
3
fYear
2005
fDate
4-6 Oct. 2005
Abstract
A high-linearity and high-efficiency MMIC power amplifier is demonstrated adopting a new on-chip adaptive bias circuit, which improves efficiency at the low output power level and linearity at the high output power level automatically. The intelligent two-stage W-CDMA power amplifier using the newly proposed adaptive bias circuit extends the maximum linear output power of 0.6dB and exhibits an improvement of average power usage efficiency by 1.85 times with a quiescent current of 36mA.
Keywords
MMIC power amplifiers; code division multiple access; mobile handsets; 36 mA; MMIC power amplifier; handset applications; on-chip adaptive bias circuit; output power level; two-stage W-CDMA power amplifier; two-stage adaptive power amplifier; Adaptive control; Circuits; High power amplifiers; Linearity; MMICs; Multiaccess communication; Power amplifiers; Power generation; Programmable control; Telephone sets;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2005 European
Print_ISBN
2-9600551-2-8
Type
conf
DOI
10.1109/EUMC.2005.1610220
Filename
1610220
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