DocumentCode :
346273
Title :
SC/sup 2/L; a low-power high-performance dynamic differential logic family
Author :
Fahim, Amr M. ; Elmasry, Mohamed I.
Author_Institution :
VLSI Res. Group, Waterloo Univ., Ont., Canada
fYear :
1999
fDate :
17-17 Aug. 1999
Firstpage :
88
Lastpage :
90
Abstract :
A new dynamic differential logic family, Short-Circuit Current Logic (SC/sup 2/L), is proposed for low-power high-performance applications. It achieves low-power consumption by using an aggressively reduced logic swing without requiring restoration circuitry. Using a 0.35 /spl mu/m CMOS technology and a nominal supply voltage of 3.3 V, a SC/sup 2/L full-adder 8 carry ripple adder (CRA) is implemented. It offers an order of magnitude less power-delay product than several other logic families.
Keywords :
CMOS logic circuits; adders; logic gates; low-power electronics; 0.35 micron; 2.34 mW; 3.3 V; 727 MHz; CMOS technology; SC/sup 2/L logic family; carry ripple adder; dynamic differential logic family; full-adder; high-performance applications; low-power logic family; short-circuit current logic; CMOS logic circuits; CMOS technology; Digital circuits; Energy consumption; Inverters; Logic circuits; Logic devices; MOS devices; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
1-58113-133-X
Type :
conf
Filename :
799416
Link To Document :
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