Power macro-models for DSP blocks with application to high-level synthesis

In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, such as adders, multipliers and delay elements, in terms of their input/output signal switching statistics. The resulting power macromodel, consisting of a quadratic or cubic equation in four variables, can be used to estimate the average power consumed in the macro-block for any given input/output signal statistics. This enables high-level power estimation and allows one to compare the power performance of different competing DSP systems during high-level synthesis. This approach has been implemented and models have been built and tested for many macro-blocks.