DocumentCode
346288
Title
VIP-an input pattern generator for identifying critical voltage drop for deep sub-micron designs
Author
Jiang, Yi-Min ; Young, Tak K. ; Cheng, Kwang-Ting
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
fYear
1999
fDate
17-17 Aug. 1999
Firstpage
156
Lastpage
161
Abstract
We present a novel input pattern generator for dynamic power network simulation. The obtained patterns successfully identify critical voltage drop areas for a set of industrial designs, which are difficult to be found using functional vectors. The search engine of the pattern generator for worst-case IR voltage drop is based on the multiobjective genetic algorithm. To achieve high coverage for critical voltage drop cells, we propose to model the search criteria into the maximum weighted matching of a bipartite graph, and guide the search direction according to the matching results. Experimental results show that, compared with the other approaches, our patterns give a higher coverage of critical voltage drop cells.
Keywords
automatic test pattern generation; circuit analysis computing; genetic algorithms; graph theory; integrated circuit design; integrated circuit reliability; integrated circuit testing; low-power electronics; VIP input pattern generator; bipartite graph; critical voltage drop cells; critical voltage drop identification; deep submicron designs; dynamic power network simulation; industrial designs; maximum weighted matching; multiobjective genetic algorithm; search engine; worst-case IR voltage drop; Bipartite graph; Computer networks; Design engineering; Electronic mail; Genetic algorithms; Permission; Power engineering computing; Power generation; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
Conference_Location
San Diego, CA, USA
Print_ISBN
1-58113-133-X
Type
conf
Filename
799432
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