Title :
Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC´s
Author :
Keshavarzi, Ali ; Narendra, Siva ; Borkar, Shekhar ; Hawkins, Chuck ; Roy, Kaushik ; De, Vivek
Author_Institution :
MicroComput. Res. Lab., Intel Corp., Hillsboro, OR, USA
Abstract :
We demonstrate that, there is an optimum reverse body bias, unique to any technology generation, that minimizes the standby leakage power consumption of an IC design implemented in that technology. We also show: (1) the optimum reverse body bias value reduces by /spl sim/2X per technology generation, and (2) the maximum achievable leakage power reduction by reverse body biasing diminishes by /spl sim/4X per generation under constant field technology scaling scenario. Optimum point occurs as a result of reduction in subthreshold leakage and an increase injunction band-to-band tunneling leakage with applied reverse bias. Therefore, new junction engineering techniques to reduce the bulk band-to-band tunneling leakage current component across the junction are needed to preserve the effectiveness of reverse body biasing for standby leakage control in future technologies.
Keywords :
CMOS integrated circuits; integrated circuit design; integrated circuit technology; leakage currents; low-power electronics; tunnelling; CMOS ICs; IC design; applied reverse bias; injunction band-to-band tunneling leakage; junction engineering techniques; optimum reverse body bias; standby leakage power reduction; subthreshold leakage; technology scaling behavior; CMOS technology; Energy consumption; Leakage current; Logic devices; Logic testing; P-n junctions; Power generation; Power measurement; Subthreshold current; Tunneling;
Conference_Titel :
Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
1-58113-133-X