Title :
Effect of technology scaling on temperature independent point (TIP) in MOS transistors
Author :
Yan, Leung Wing ; Chan, Mansun
Author_Institution :
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol.
Abstract :
To facilitate the use of TIP in circuit implementation, effects of technology scaling on temperature independence point (TIP) in MOS transistor are discussed in this paper. Under technology scaling, location of TIP moves closer to threshold voltage (VT) of a device and starts to appear in PMOS instead of NMOS. Such observations will be explained together with other reported observations (Hisamitsu et al, 2003) in this paper through studying the physics behind TIP
Keywords :
MOSFET; integrated circuit design; scaling circuits; MOS transistors; PMOS; circuit implementation; technology scaling; temperature independent point; Channel bank filters; Circuits; Doping; MOS devices; MOSFETs; Physics; Temperature dependence; Temperature distribution; Temperature measurement; Threshold voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306161
