A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology

Author

Nomura, Shuou ; Tachibana, Fumihiko ; Fujita, Tetsuya ; Teh, Chen Kong ; Usui, Hiroyuki ; Yamane, Fumiyuki ; Miyamoto, Yukimasa ; Kumtornkittikul, Chaiyasit ; Hara, Hiroyuki ; Yamashita, Takahiro ; Tanabe, Jun ; Uchiyama, Masato ; Tsuboi, Yoshiro ; Miyamo

Author_Institution

Toshiba, Kawasaki, Kawasaki

fYear

2008

fDate

3-7 Feb. 2008

Firstpage

262

Lastpage

612

Abstract

A AAC-decoding, H.264 decoding, media processor with embedded forward-body-biasing and power-gating circuit in CMOS technology is proposed. Since all the components necessary for the scheme are simple MOS circuits requiring no extra supply voltages, they can be placed and routed by a commercial CAD tool. A data-mapping flip-flop was proposed as a high performance and low-power flip-flop. It is concluded that the power dissipation in H.264 720p 60fps decoding of 620mW at the process fast corner is the lowest among the processor-based solutions.

Keywords

CMOS integrated circuits; audio coding; circuit CAD; code standards; decoding; flip-flops; microprocessor chips; AAC-decoding; CAD tool; CMOS technology; H.264 decoding; advanced audio coding; data-mapping flip-flop; embedded forward-body-biasing circuit; low-power flip-flop; media processor; power 620 mW; power 9.7 mW; power-gating circuit; size 65 nm; CMOS process; CMOS technology; Circuits; Decoding; Delay; Flip-flops; Frequency; Scalability; Signal processing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International

Conference_Location

San Francisco, CA

Print_ISBN

978-1-4244-2010-0

Electronic_ISBN

978-1-4244-2011-7

Type

conf

DOI

10.1109/ISSCC.2008.4523157

Filename

4523157