A High-Density 45nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing

In this work, an SRAM in low-power 45nm CMOS is composed of 0.25mum² bit-cells and uses an offset-compensating non-strobed regenerative sense-amplifier (NSR-SA); this eliminates the need to insert timing margin for variation and tracking errors in the strobe signal, and it achieves higher sensitivity than conventional SAs, allowing read SNM to be optimized at the cost of I_READ. The NSR-SA uses nearly minimum-sized inverters, so its delay and area scaling follow logic trends more closely than conventional SAs.