DocumentCode :
3466017
Title :
Full duplex speech and data coder: algorithm enhancement test bed
Author :
Jain, V.K. ; Skrzypkowiak, S.S. ; Heathcock, R.B.
Author_Institution :
Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA
fYear :
1988
fDate :
28 Nov-1 Dec 1988
Firstpage :
1409
Abstract :
The authors present a bit-for-bit compatible full-duplex realization of the CCITT ADPCM (adaptive differential pulse code modulation) transcoder algorithm (G.721) and a functional real-time testbed for algorithm modifications. The coder is designed around a single TMS320C25 microprocessor. They have built peripheral processing circuitry to decrease computation time and facilitate testing. The base and modified algorithms (for voice and data coding) can be selectively compared. In particular, the authors evaluate a key modification for prevention of transition errors which occur in certain FSK (frequency shift-keying) modems
Keywords :
codecs; data communication equipment; electronic equipment testing; encoding; microprocessor chips; modems; pulse-code modulation; voice communication; ADPCM transcoder algorithm; CCITT; FSK modems; G.721; TMS320C25 microprocessor; adaptive differential pulse code modulation; algorithm enhancement test bed; codecs; frequency shift-keying; full duplex data coder; full duplex speech coder; peripheral processing circuitry; Algorithm design and analysis; Circuit testing; Clocks; EPROM; Hardware; Microprocessors; Modems; Phase change materials; Random access memory; Speech enhancement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference, 1988, and Exhibition. 'Communications for the Information Age.' Conference Record, GLOBECOM '88., IEEE
Conference_Location :
Hollywood, FL
Type :
conf
DOI :
10.1109/GLOCOM.1988.26058
Filename :
26058
Link To Document :
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