Design and FPGA implementation of OLT for EPON

This paper presents the field programmable gate array (FPGA) design and implementation of the OLT used for Ethernet passive optical network (EPON). To reduce working frequency of the FPGA, the byte-to-word conversion is proposed. Propagation delays are equalized by ranging procedure so as to avoid data collision. VLAN solution is illustrated in detail to guarantee data segregation and priority scheduling. A fast CAM scheme is introduced to finish search operation in one clock cycle. Experimental results show that the proposed system can function properly in a low cost FPGA