DocumentCode
3469862
Title
Reincarnate historic systems on FPGA with novel design methodology
Author
Shimizu, Naohiko
Author_Institution
IP ARCH, Inc., Tokai Univ., Tokyo, Japan
fYear
2009
fDate
4-7 Oct. 2009
Firstpage
10
Lastpage
15
Abstract
In this paper, I introduce my and my students projects to reincarnate historic systems on FPGA. Our projects are not replica nor paper-model of historic systems, but reorganized and working system on FPGA with novel and progressive design methodology. I mean progressive as under the development, because I have developed them and I am still improving the methodology and tools very often to use them by myself. In this paper, I also introduce my design methodology and tools which is used in my and my students projects.
Keywords
electronic engineering education; field programmable gate arrays; logic design; FPGA; historic systems; progressive design methodology; student projects; Art; Central Processing Unit; Design engineering; Design methodology; Electronic design automation and methodology; Field programmable gate arrays; Hardware design languages; Laboratories; Painting; Unified modeling language;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2009. ICCD 2009. IEEE International Conference on
Conference_Location
Lake Tahoe, CA
ISSN
1063-6404
Print_ISBN
978-1-4244-5029-9
Electronic_ISBN
1063-6404
Type
conf
DOI
10.1109/ICCD.2009.5413182
Filename
5413182
Link To Document