DocumentCode :
3471209
Title :
A 1.0625 Gbps transceiver with 2x-oversampling and transmit signal pre-emphasis
Author :
Fiedler, A. ; Mactaggart, R. ; Welch, J. ; Krishnan, S.
Author_Institution :
LSI Logic Corp., Milpitas, CA, USA
fYear :
1997
fDate :
8-8 Feb. 1997
Firstpage :
238
Lastpage :
239
Abstract :
A fibre channel compliant 1.0625 Gb/s serial interface core is a complete transceiver, integrating data serialization, clock/data recovery, and at-speed self-test functions. The CMOS core occupies <4 mm/sup 2/, consumes <0.45 W, and can be integrated with a family of standard cells.
Keywords :
CMOS digital integrated circuits; optical communication equipment; signal sampling; transceivers; 0.45 W; 1.0625 Gbit/s; CMOS core; at-speed self-test function; clock/data recovery; data serialization; optical fibre channel; oversampling; serial interface; transceiver; transmit signal pre-emphasis; Built-in self-test; CMOS logic circuits; Clocks; Frequency; Jitter; Large scale integration; Phase locked loops; Transceivers; Transmitters; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-3721-2
Type :
conf
DOI :
10.1109/ISSCC.1997.585369
Filename :
585369
Link To Document :
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