DocumentCode
3471392
Title
Circuit design of an improved approximate squaring function
Author
Xun, Zhang ; Weiwei, Jin ; Dongming, Jin
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume
2
fYear
2005
fDate
24-27 Oct. 2005
Firstpage
1082
Lastpage
1084
Abstract
An improved approach to design the approximate squaring function is presented in this paper. It is implemented through a simple combinational logic circuit with fewer transistors. In addition, the maximum relative error (MRE) and average relative error (ARE) of squaring approximation are both improved compared with the previous methods. The algorithm is implemented by a VLSI design of 7-bit approximate squaring function.
Keywords
VLSI; approximation theory; combinational circuits; digital arithmetic; logic design; 7 bit; MRE; VLSI; approximate squaring function; average relative error; combinational logic circuit; maximum relative error; Algorithm design and analysis; Assembly; Circuit synthesis; Combinational circuits; Costs; Equations; Hardware; Microelectronics; Signal processing algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2005. ASICON 2005. 6th International Conference On
Print_ISBN
0-7803-9210-8
Type
conf
DOI
10.1109/ICASIC.2005.1611512
Filename
1611512
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