Title :
A 0.5 V 200 MHz 1-stage 32 b ALU using a body bias controlled SOI pass-gate logic
Author :
Fuse, T. ; Oowaki, Y. ; Yamada, T. ; Kamoshida, M. ; Ohta, A. ; Shino, T. ; Kawanaka, S. ; Terauchi, M. ; Yoshida, T. ; Matsubara, G. ; Yoshioka, S. ; Watanabe, S. ; Yoshimi, M. ; Ohuchi, K. ; Manabe, S.
Author_Institution :
ULSI Labs., Toshiba Corp., Kawasaki, Japan
Abstract :
SOI CMOS with gate-body connection (DTMOS) and body bias controlled SOI pass-gate logic (BCSOI pass-gate) take advantage of individually isolated SOI device active area and reduce threshold voltage by controlling each device body bias. Hence, they enjoy higher speed than circuits based on fixed low threshold voltage. The direct body bias control used in previous work suffers from leakage current at supply voltage higher than 0.8V due to drain-body junction leakage. A practical circuit technology that offers the highest speed, lowest operation voltage and stable operation under wide supply voltage demonstrates performance with an ALU macro using this technology.
Keywords :
CMOS logic circuits; circuit stability; integrated circuit design; leakage currents; silicon-on-insulator; 0.5 V; 200 MHz; 32 bit; ALU; CMOS; SOI pass-gate logic; body bias control; drain-body junction leakage; gate-body connection; leakage current; stable operation; threshold voltage; CMOS logic circuits; Capacitance; Circuit testing; Energy consumption; Leakage current; Logic devices; MOS devices; Threshold voltage; Voltage control; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3721-2
DOI :
10.1109/ISSCC.1997.585387
