A 1 V CMOS digital circuits with double-gate-driven MOSFET

The double gate driven MOSFET (DGMOS) described here is built with standard CMOS technology without the use of low V/sub th/ transistors. The body of the MOSFET is dynamically connected to the gate by a capacitor. This adjusts its effective threshold voltage during operation automatically. It offers faster switching speed while having a lower static power dissipation, and is ideal for high-speed low-voltage systems. In conventional CMOS design, the body (or bulk) of the transistor is connected to the appropriate supply rail. In DGMOS, the potential of the body is determined by its operating state. This allows transistors to have a much higher drain current when turned on (effective low V/sub th/) and much lower leakage current when turned off (effective high V/sub th/) compared with the conventional fixed back gate bias configuration. This mode has the potential for high-speed operation and minimum static power dissipation.