On-Chip ESD Protection Strategies for RF Circuits in CMOS Technology

Author

Ker, Ming-Dou ; Hsiao, Yuan-Wen

Author_Institution

Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu

fYear

2006

fDate

2006

Firstpage

1680

Lastpage

1683

Abstract

Electrostatic discharge (ESD) protection design for RF circuits has been one of the key challenges to implement RF ICs in CMOS technology. On-chip ESD protection circuit at the RF I/O pads often cause unacceptable degradation to RF circuits. In this paper, ESD protection design considerations for RF circuits are addressed, and on-chip ESD protection strategies for both narrow band and broadband CMOS RF circuits are also presented and discussed

Keywords

CMOS integrated circuits; electrostatic discharge; radiofrequency integrated circuits; CMOS technology; RF IC; broadband CMOS RF circuits; electrostatic discharge protection circuit; narrow band CMOS RF circuits; on-chip ESD protection circuit; on-chip ESD protection strategies; CMOS technology; Degradation; Electrostatic discharge; Impedance matching; Narrowband; Noise figure; Parasitic capacitance; Protection; Radio frequency; Radiofrequency integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306371

Filename

4098510

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3471763