DocumentCode
3472216
Title
A Cascaded Sigma-Delta Pipeline ADC Structure Design
Author
Li, Liang ; Li, Ruzhang ; Li, Kaicheng
Author_Institution
Nat. Key Labs. of Analog ICs, Sichuan Inst. of Solid-State Circuits, Chongqing
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
1757
Lastpage
1759
Abstract
This paper discussed a 2-order 5-bit Sigma-Delta modulator cascaded 12-bit pipeline ADC structure, analyzed its noise characteristic, provided main building block circuit structure, and presented behavioral and circuit simulation result, circuit implementation and layout design
Keywords
analogue-digital conversion; cascade networks; circuit noise; circuit simulation; integrated circuit layout; sigma-delta modulation; Sigma-Delta modulator; cascaded 12-bit pipeline ADC structure; cascaded Sigma-Delta pipeline ADC structure; circuit implementation; circuit simulation; circuit structure; integrated circuit layout; noise characteristics; Delta-sigma modulation; Digital modulation; Energy consumption; Frequency; Information systems; Noise shaping; Pipelines; Signal resolution; Signal to noise ratio; Solid state circuit design;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306417
Filename
4098534
Link To Document